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Extraction of bias-dependent parasitic source/drain resistance in MOSFETs with an advanced mobility modelCHANG, Yang-Hua; YANG, Kun-Ying.Microelectronics and reliability. 2010, Vol 50, Num 2, pp 174-178, issn 0026-2714, 5 p.Article

Metal-replaced junction for reducing the junction parasitic resistance of a TFTDONGLI ZHANG; MAN WONG.IEEE electron device letters. 2006, Vol 27, Num 4, pp 269-271, issn 0741-3106, 3 p.Article

Piezoresistive coefficients of (110) silicon-on-insulator MOSFETs with 0.135/0.45/10 micrometers channel length with external forcesCHANG, W. T; LIN, J. A.Microelectronic engineering. 2009, Vol 86, Num 7-9, pp 1965-1968, issn 0167-9317, 4 p.Conference Paper

Leakage inductance compensation for loosely coupled transformer considering parasitic resistanceYU, X. J; CHENG, J. M.Electronics letters. 2010, Vol 46, Num 10, pp 717-719, issn 0013-5194, 3 p.Article

InGaAs HEMT with InAs-rich InAlAs barrier spacer for reduced source resistanceKIM, T.-W; KIM, D.-H; DEL ALAMO, J. A et al.Electronics letters. 2011, Vol 47, Num 6, pp 406-407, issn 0013-5194, 2 p.Article

Modeling and Separate Extraction of Gate-Bias- and Channel-Length-Dependent Intrinsic and Extrinsic Source-Drain Resistances in MOSFETsBAE, Hagyoul; JANG, Jaeman; JA SUN SHIN et al.IEEE electron device letters. 2011, Vol 32, Num 6, pp 722-724, issn 0741-3106, 3 p.Article

Percolation resistance evolution during progressive breakdown in narrow MOSFETsLO, V. L; PEY, K. L; TUNG, C. H et al.IEEE electron device letters. 2006, Vol 27, Num 5, pp 396-398, issn 0741-3106, 3 p.Article

Improved direct determination of MOSFET saturation voltage using Fourier techniquesPICOS, Rodrigo; ROCA, Miquel; INIGUEZ, Benjamin et al.I.E.E.E. transactions on electron devices. 2004, Vol 51, Num 12, pp 2073-2077, issn 0018-9383, 5 p.Article

Closed-form model for the open circuit voltage of solar cells with shunt resistance, bias-dependent photocurrent and double exponential termsSALEEM, H; KARMALKAR, S.IET circuits, devices & systems (Print). 2012, Vol 6, Num 4, pp 211-217, issn 1751-858X, 7 p.Article

Power performance improvements for high pressure ripple energy harvesting : Adaptive and active materialsSKOW, E. A; CUNEFARE, K. A; ERTURK, A et al.Smart materials and structures. 2014, Vol 23, Num 10, issn 0964-1726, 104011.1-104011.7Conference Paper

Efficient and Accurate Schematic Transistor Model of FinFET Parasitic ElementsNING LU; HOOK, Terence B; JOHNSON, Jeffrey B et al.IEEE electron device letters. 2013, Vol 34, Num 9, pp 1100-1102, issn 0741-3106, 3 p.Article

Suspended electrodes for reducing parasitic capacitance in electret energy harvestersRUI CHEN; SUZUKI, Yuji.Journal of micromechanics and microengineering (Print). 2013, Vol 23, Num 12, issn 0960-1317, 125015.1-125015.7Article

Metal-to-Multilayer-Graphene Contact—Part II: Analysis of Contact ResistanceKHATAMI, Yasin; HONG LI; CHUAN XU et al.I.E.E.E. transactions on electron devices. 2012, Vol 59, Num 9, pp 2453-2460, issn 0018-9383, 8 p.Article

Short-Channel Performance Improvement by Raised Source/Drain Extensions With Thin Spacers in Trigate Silicon Nanowire MOSFETsSAITOH, Masumi; NAKABAYASHI, Yukio; UCHIDA, Ken et al.IEEE electron device letters. 2011, Vol 32, Num 3, pp 273-275, issn 0741-3106, 3 p.Article

Impact of metal silicide layout covering source/drain diffusion region on minimization of parasitic resistance of triple-gate SOI MOSFET and proposal of practical design guidelineOMURA, Yasuhisa; YOSHIMOTO, Kazuhisa; HAYASHI, Osanori et al.Solid-state electronics. 2009, Vol 53, Num 9, pp 959-971, issn 0038-1101, 13 p.Article

The New CMC Standard Compact MOS Model PSP: Advantages for RF ApplicationsSCHOLTEN, Andries J; SMIT, Geert D. J; DE VRIES, Bart A et al.IEEE journal of solid-state circuits. 2009, Vol 44, Num 5, pp 1415-1424, issn 0018-9200, 10 p.Conference Paper

Device performance improvement of InGaP/InGaAs doped-channel FETsCHIEN, Feng-Tso; YIN, Jin-Mu; CHIU, Hsien-Chin et al.IEEE electron device letters. 2005, Vol 26, Num 12, pp 861-863, issn 0741-3106, 3 p.Article

A novel low cost 65nm CMOS process architecture with self aligned isolation and W cladded source/drainBLOSSE, A; RAMKUMAR, K; GOPALAN, P et al.International Electron Devices Meeting. 2004, pp 669-672, isbn 0-7803-8684-1, 1Vol, 4 p.Conference Paper

Effect and extraction of series resistance in Al2O3-InGaAs MOS with bulk-oxide trapYU, B; YUAN, Y; CHEN, H.-P et al.Electronics letters. 2013, Vol 49, Num 7, pp 492-493, issn 0013-5194, 2 p.Article

Variability Origins of Parasitic Resistance in FinFETs With Silicided Source/DrainMATSUKAWA, Takashi; YONGXUN LIU; ENDO, Kazuhiko et al.IEEE electron device letters. 2012, Vol 33, Num 4, pp 474-476, issn 0741-3106, 3 p.Article

A global network for investigating the genomic epidemiology of malaria : Quantitative geneticsNature (London). 2008, Vol 456, Num 7223, pp 732-737, issn 0028-0836, 6 p.Article

Design and testing of a polymeric microgripper for cell manipulationSOLANO, Belen; WOOD, David.Microelectronic engineering. 2007, Vol 84, Num 5-8, pp 1219-1222, issn 0167-9317, 4 p.Conference Paper

Power Trench MOSFETs with very low specific on-resistance for 25 V applicationsGOARIN, Pierre; VAN DALEN, Rob; KOOPS, Gerhard et al.Solid-state electronics. 2007, Vol 51, Num 11-12, pp 1589-1595, issn 0038-1101, 7 p.Conference Paper

Ultra-short n-MOSFETs with strained Si : device performance and the effect of ballistic transport using Monte Carlo simulationAUBRY-FORTUNA, Valérie; BOURNEL, Arnaud; DOLLFUS, Philippe et al.Semiconductor science and technology. 2006, Vol 21, Num 4, pp 422-428, issn 0268-1242, 7 p.Article

High-performance poly-Si TFTs fabricated by implant-to-silicide techniqueLIN, Chia-Pin; XIAO, Yi-Hsuan; TSUI, Bing-Yue et al.IEEE electron device letters. 2005, Vol 26, Num 3, pp 185-187, issn 0741-3106, 3 p.Article

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